K3 CoM260 Kit
A Full-Featured RISC-V Development Kit for Embodied AI
Product Description
The SpacemiT K3-CoM260 developer kit integrates an 8-core general-purpose CPU and an 8-core AI CPU into a compact core module and reference carrier board, delivering up to 60 TOPS of AI compute and 130 KDMIPS of general-purpose computing performance. It runs large models with up to 30 billion parameters smoothly, making it a complete development and validation platform for edge AI.
Built on the RISC-V architecture, the kit supports mainstream AI model deployment and follows standard CPU programming paradigms, enabling zero-cost migration of AI algorithms. It is also hardware-compatible with Jetson Orin Nano, making it suitable for engineering deployment of AI all-in-one machines, service robots, and edge autonomous agents.
Product Overview
Key Features
- High-Performance Edge AI60 TOPS of general-purpose AI compute for smooth inference of 30B-class large models and multi-stream concurrent applications.
- CPU + AI CPU ArchitectureCo-designed general-purpose CPU and AI CPU, balancing system computing and high-performance inference needs.
- Modular DesignCore module plus universal carrier board form factor, compatible with the entire K3-CoM260 series for rapid integration.
- Developer FriendlyFollows standard CPU programming paradigms for zero-cost migration of AI algorithms and system software.
- Cutting-Edge RISC-V ArchitectureThe world’s first compact RISC-V edge computing platform supporting the RVA23 standard.
- Rich Standard InterfacesComprehensive high-speed IO and expansion interfaces for cameras, sensors, and peripherals.
- Built for Real-World ScenariosSuitable for AI all-in-one machines, service robots, and edge autonomous agent applications.
- Engineering SupportSupports custom software, carrier board design, and system-level engineering to accelerate product launch.
Specifications
| Chip | SpacemiT K3 RISC-V AI CPU chip |
|---|---|
| CPU | 8x X100 64-bit RISC-V cores @ >2.1GHz; 2 clusters × 4 cores/cluster; 4MB shared L2 cache per cluster, accessible across clusters; 64KB I-cache and 64KB D-cache per X100 core; RVA23 profile compliant; supports RVV 1.0, VLEN: 256-bit |
| AI Performance | 8x A100 AI cores delivering 60 TOPS of AI compute; 2 clusters × 4 cores/cluster; 1MB shared L2 cache and 1.5MB dedicated accelerator cache (TCM) per cluster, accessible across clusters; 32KB I-cache and 32KB D-cache per A100 core; supports RVV 1.0, VLEN: 1024-bit |
| Hardware Security Engine | Supports international standard and Chinese commercial cryptographic algorithms; hash: SHA1 / SHA224 / SHA256, SM3; symmetric: AES-128/192/256, SM4; asymmetric: RSA-1024/2048/4096, ECC-128/256/512, SM2 |
| Security System | HW-RoT based Secure Boot; TEE trusted computing via RISC-V PMP/IOPMP isolation; OP-TEE secure OS support |
| GPU | Integrated 3D GPU supporting Vulkan, OpenCL, and OpenGL ES |
| Memory | 32GB 64-bit LPDDR5, 6400 MT/s |
| Storage | Internal UFS, SD card slot, and external NVMe support |
| Video Encoding | 4K60 (H.264/H.265) |
| Video Decoding | 1 × 4K120 (H.264/H.265/VP9); 2 × 4K60 (H.264/H.265/VP9); 8 × 1080p60 (H.264/H.265/VP9); 16 × 1080p30 (H.264/H.265/VP9) |
| Power Consumption | 18W~35W |
| Camera Interfaces | 2 × MIPI CSI-2 22-pin camera connectors |
| PCIe | M.2 Key M slot (PCIe Gen3 ×4) |
| USB | 4 × USB 3.0 Type-A ports; USB Type-C port with DP mode support |
| Network | 1 × Gigabit Ethernet port |
| Display | 1 × DP 1.2 port; 1 × MIPI DSI-1.2 30-pin display connector |
| Other I/O | 40-pin expansion header (UART, SPI, I2S, I2C, GPIO); 12-pin button header; 4-pin fan connector; DC power jack |
| Mechanical Dimensions | 103mm × 90.5mm × 35mm (height includes feet, carrier board, module, and cooling solution) |